{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1551659123249 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Elaboration Quartus Prime " "Running Quartus Prime Analysis & Elaboration" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition " "Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1551659123250 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 04 08:25:22 2019 " "Processing started: Mon Mar 04 08:25:22 2019" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1551659123250 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Design Software" 0 -1 1551659123250 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off my_first_fpga -c my_first_fpga --analysis_and_elaboration " "Command: quartus_map --read_settings_files=on --write_settings_files=off my_first_fpga -c my_first_fpga --analysis_and_elaboration" {  } {  } 0 0 "Command: %1!s!" 0 0 "Design Software" 0 -1 1551659123250 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Design Software" 0 -1 1551659125033 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_ONE_PROCESSOR" "" "Only one processor detected - disabling parallel compilation" {  } {  } 0 20029 "Only one processor detected - disabling parallel compilation" 0 0 "Design Software" 0 -1 1551659125033 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "my_first_fpga.v 1 1 " "Found 1 design units, including 1 entities, in source file my_first_fpga.v" { { "Info" "ISGN_ENTITY_NAME" "1 my_first_fpga " "Found entity 1: my_first_fpga" {  } { { "my_first_fpga.v" "" { Text "E:/My_design/my_first_fpga/my_first_fpga.v" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1551659166163 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Design Software" 0 -1 1551659166163 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "my_first_fpga " "Elaborating entity \"my_first_fpga\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Design Software" 0 -1 1551659166319 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Elaboration 0 s 1  Quartus Prime " "Quartus Prime Analysis & Elaboration was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4798 " "Peak virtual memory: 4798 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1551659166507 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 04 08:26:06 2019 " "Processing ended: Mon Mar 04 08:26:06 2019" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1551659166507 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:44 " "Elapsed time: 00:00:44" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1551659166507 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:24 " "Total CPU time (on all processors): 00:00:24" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1551659166507 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Design Software" 0 -1 1551659166507 ""}